I/O pads may include ESD protection and other circuitry. See Analog-VLSI Open-IP Chapter 2 for circuit diagrams and further details (in Japanese).
VSS/VDD are intended for the analog core of the chip. VSS is normally also the substrate connection.
PVSSVSS0/VDD0 are intended for digital peripheral circuitry.
PVSS0VSS1/VDD1 are intended for the digital core of the chip.
PVSS1VSSE/VDDE are intended for analog peripheral circuitry.
PVSSEPATH is an ESD-protected.pad intended for low impedance analog I/O.
PATHPATHR is an ESD-protected.pad with a series resistor intended for high impedance analog input.
PATHRPDIN is an ESD-protected.pad with a CMOS input buffer.
PDINPDOUT is an ESD-protected.pad with a CMOS output buffer.
PDOUTPDTH is an ESD-protected.pad intended for specialized digital ouputs such as LVDS .
PDTHPDTHR is an ESD-protected.pad with a series resistor intended for specialized digital inputs such as LVDS .
PDTHRTROUT is an ESD-protected.pad with a tri-state CMOS output buffer.
TROUTPAD is a pad without any additional circuitry.
PAD
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